Altera Integer Arithmetic IP Manuale Utente Scaricare il pdf (Pagina 45)

data:in std_logic_vector(width_codeword-1 downto 0);

q:out std_logic_vector(width_dataword-1 downto 0));

end component;

VHDL LIBRARY_USE Declaration

The VHDL LIBRARY-USE declaration is not required if you use the VHDL Component Declaration.

LIBRARY altera_mf;

USE altera_mf.altera_mf_components.all;

Ports (ALTECC_ENCODER)

The following tables list the input and output ports for the ALTECC_ENCODER megafunction.

Table 5-3: ALTECC_ENCODER Megafunction Input Ports

Port Name Required Description

data[] Yes Data input port. The size of the input port depends on the WIDTH_

DATAWORD parameter value. The data[] port contains the raw data to be

encoded.

clock Yes Clock input port that provides the clock signal to synchronize the

encoding operation. The clock port is required when the LPM_

PIPELINE value is greater than 0.

clocken No Clock enable. If omitted, the default value is 1.

aclr No Asynchronous clear input. The active high aclr signal can be used at

any time to asynchronously clear the registers.

Table 5-4: ALTECC_ENCODER Megafunction Output Ports

Port Name Required Description

q[] Yes Encoded data output port. The size of the output port depends on the

WIDTH_CODEWORD parameter value.

Ports (ALTECC_DECODER)

The following tables list the input and output ports for the ALTECC_DECODER megafunction.

Table 5-5: ALTECC_DECODER Megafunction Input Ports

Port Name Required Description

data[] Yes Data input port. The size of the input port depends on the WIDTH_

CODEWORD parameter value.

UG-01063

2014.12.19

VHDL LIBRARY_USE Declaration

5-7

ALTECC (Error Correction Code: Encoder/Decoder)

Altera Corporation

Send Feedback

1 2 ... 40 41 42 43 44 45 46 47 48 49 50 ... 156 157

Nessun commento

Altera Integer Arithmetic IP Manuale Utente Pagina 45