Altera CPRI v6.0 MegaCore Function Manuale Utente Pagina 70
- Pagina / 115
- Indice
- SEGNALIBRI
Valutato. / 5. Basato su recensioni clienti
6. If the CPRI line bit rate is greater than 6.144 Gbps, increment the tx_ctrl_seq field of the
CTRL_INDEX register to the value of 3 and write the fourth 32-bit section of the next intended #Z.X
control word to the TX_CTRL register.
7. If the CPRI line bit rate is 10.1376 Gbps, increment the tx_ctrl_seq field of the CTRL_INDEX register
to the value of 4 and write the fifth 32-bit section of the next intended #Z.X control word (the real-time
vendor specific bytes) to the TX_CTRL register.
8. Set the tx_ctrl_insert bit of the CTRL_INDEX register to the value of 1.
9. After you update the control transmit table, set the tx_ctrl_insert_en bit of the L1_CONFIG register
to enable the CPRI v6.0 IP core to write the values from the control transmit table to the control words
in the outgoing CPRI frame.
The tx_control_insert bit of the CTRL_INDEX register enables or disables the transmission of the
corresponding control transmit table entry in the CPRI frame. The tx_ctrl_insert_en bit of the
L1_CONFIG register is the master enable: when it is set, the CPRI v6.0 IP core writes all table entries with
the tx_ctrl_insert bit set into the CPRI frame.
Example 3-2: Control Word Transmission Example
To write the vendor-specific portion of the control word in a transmitted hyperframe, perform
the following steps:
1. Identify the indices for the vendor-specific portion of the transmit control table, using the
formula X = Ns + 64 + Xs.
In the example, Ns = 16 and Xs = 0, 1, 2, and 3. Therefore, the indices to be read are 16, 80,
144, and 208.
2. For each value X in 16, 80, 144, and 208, perform the sequence of steps listed above.
After you update the control transmit table with the control bytes, to insert the data in the next
outgoing CPRI frame, make sure that you set thetx_ctrl_insert_en bit of the L1_CONFIG
register to the value of 1 as specified in the instructions.
Auto-Rate Negotiation
If you turn on Enable auto-rate negotiation in the CPRI v6.0 parameter editor, the auto-rate negotiation
control and status interface is available. The CPRI v6.0 IP core provides support for dynamically changing
the CPRI line bit rate, but requires that you implement user logic to control the auto-rate negotiation
process. You control the process through the auto-rate negotiation control and status interface or the
BIT_RATE_CONFIG register at offset 0x0C.
3-40
Auto-Rate Negotiation
UG-01156
2014.08.18
Altera Corporation
Functional Description
Send Feedback
- 101 Innovation Drive 1
- San Jose, CA 95134 1
- Contents 2
- About the CPRI v6.0 IP Core 5
- Device Family Support 7
- IP Core Verification 8
- Release Information 10
- Related Information 11
- Installation and Licensing 13
- 2014.08.18 14
- File Name Description 15
- CPRI v6.0 IP Core Parameters 18
- Parameter Range Default 20
- Parameter Description 20
- Adding the Clean-Up PLL 23
- Adding the External TX PLL 24
- Simulating Altera IP Cores 27
- Understanding the Testbench 28
- Running the Testbench 28
- Parameter Value 29
- Functional Description 31
- Information 35
- AUX Interface 39
- AUX Interface Signals 40
- AUX RX Interface Data Signals 41
- AUX TX Interface Data Signals 42
- AUX Interface Synchronization 47
- Auxiliary Latency Cycles 47
- Direct IQ Interface 51
- Direct HDLC Serial Interface 57
- RX MII Signals 62
- TX MII Signals 63
- MII Status Signals 64
- CPU Interface Signals 66
- Specifying the Control Word 67
- Auto-Rate Negotiation 70
- Extended Delay Measurement 71
- Resolution 72
- Deterministic Latency 73
- CPRI Link 75
- Interface to the External PLL 78
- Testing Features 79
- CPRI v6.0 IP Core Signals 82
- Clock Name 86
- Direction 86
- CPRI v6.0 IP Core Registers 90
- 2015.02.16 91
- INTR Register 92
- L1_STATUS Register 92
- L1_CONFIG Register 93
- BIT_RATE_CONFIG Register 94
- PROT_VER Register 95
- TX_SCR Register 96
- RX_SCR Register 96
- CM_CONFIG Register 97
- CM_STATUS Register 98
- START_UP_SEQ Register 98
- START_UP_TIMER Register 99
- FLSAR Register 100
- CTRL_INDEX Register 100
- TX_CTRL Register 101
- RX_CTRL Register 102
- RX_ERR Register 102
- LOOPBACK Register 103
- RX_BFN Register 103
- Bits Field Name Type Value on 104
- Description 104
- TX_DELAY Register 105
- RX_DELAY Register 106
- TX_EX_DELAY Register 107
- RX_EX_DELAY Register 107
- ROUND_TRIP_DELAY Register 108
- XCVR_BITSLIP Register 108
- UG-01156 110
- Subscribe 110
- Send Feedback 110
- Altera Corporation 112
- Additional Information 113
- How to Contact Altera 114
- Typographic Conventions 114
- Visual Cue Meaning 115
Prodotti e manuali riguardandi Strumenti di misura Altera CPRI v6.0 MegaCore Function
(50 pagine)© 2020, manymanuals.it. Tutti i diritti riservati | 0.019 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Commenti su questo manuale