Altera PCI Compiler Manuale Utente Scaricare il pdf (Pagina 259)

Altera Corporation User Guide Version 11.1 6–9

October 2011

Parameter Settings

System

Options-2

The System Options - 2 tab in the PCI Compiler wizard defines the

complexity of the PCI-to-Avalon bridge. On this tab, you specify the

following PCI bus configurations:

■ PCI Bus Speed

■ PCI Global Reset Signal

■ PCI Data Bus Width

■ Clock Domains

■ PCI Bus Arbiter

PCI Bus Speed

PCI Bus Speed selections determine the system’s maximum clock rate.

If you select the 66-MHz clock rate, the capable bit

(pci_66mhz_capable)—which is bit 5 of the PCI status register—is set

to 1. Refer to Table 3–17 on page 3–33.

PCI Data Bus Width

PCI Data Bus Width selections determine the system’s PCI bus width.

Additionally, the PCI-Avalon bridge automatically configures the

Avalon-MM data width to be the same as the PCI data bus width.

Therefore, selecting a 64-bit PCI data bus instantiates either the

pci_mt64 or pci_t64 MegaCore function, depending on the PCI

Device Mode you specified in the System Options – 1 tab. Likewise,

selecting a 32-bit PCI data bus instantiates either the pci_mt32 or

pci_t32 MegaCore function, depending on the PCI Device Mode you

specified in the System Options – 1 tab.

PCI Clock/Reset Settings

Turning on the Enable Independent Avalon System Reset enables a

second reset signal named reset_n in the SOPC system. When

triggered, this signal resets the entire SOPC system except the PCI

Compiler, thus preserving its configuration.

The Independent PCI and Avalon Clocks option allows the PCI bus and

Avalon-MM interface to use independent clocks that can run at the same

or different speeds. Choosing this option provides maximum flexibility

but also requires more logic resources and adds latency. When you select

this option, the SOPC Builder generates a system with two clock pins

driving the PCI-Avalon bridge. One clock pin has the PCI-Avalon

bridge’s instance name and should be connected to the PCI clock source.

The other clock pin has the PCI-Avalon bridge’s instance name

appended to it and should be connected to the system’s clock source.

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Altera PCI Compiler Manuale Utente Pagina 259