Altera Cyclone V GX FPGA Development Board Manuale Utente Scaricare il pdf (Pagina 13)

Chapter 2: Board Components 2–5

Featured Device: Cyclone V GX FPGA

May 2013 Altera Corporation Cyclone V GX FPGA Development Board

Reference Manual

Featured Device: Cyclone V GX FPGA

The Cyclone V GX FPGA development board features a Cyclone V GX

5CGXFC7D6F31C7NES device (U11) in a 896-pin FBGA package.

f For more information about Cyclone V device family, refer to the Cyclone V Device

Handbook.

Table 2–2 describes the features of the Cyclone V GX 5CGXFC7D6F31C7NES device.

I/O Resources

The Cyclone V GX 5CGXFC7D6F31C7NES device has total of 480 user I/Os and nine

transceiver channels. Table 2–3 lists the Cyclone V GX device I/O pin count and usage

by function on the board.

Table 2–2. Cyclone V GX FPGA Features

ALMs

Equivalent

LEs

M10K RAM

Blocks

Total RAM

(Kbits)

18-bit × 18-bit

Multipliers

PLLs Transceivers Package Type

136,880 150,000 1,726 7,024 312 7 9 896-pin FBGA

Table 2–3. Cyclone V GX Device I/O Pin Count

Function I/O Standard I/O Count Special Pins

DDR3A 1.5-V SSTL 81 One differential x4 DQS pin

DDR3B 1.5-V SSTL 81 One differential x4 DQS pin

Flash, SSRAM, and MAX V FSM bus 2.5-V CMOS 80 —

PCI Express x4 port 2.5-V CMOS + XCVR 13 One reference clock

HSMA port 2.5-V CMOS + LVDS + XCVR 93 Four transceivers, 17 LVDS, I

Gigabit Ethernet port 2.5-V CMOS + LVDS 6 —

Embedded USB-Blaster II 2.5-V CMOS 19 —

SDI video port 2.5-V CMOS + XCVR 6 One reference clock

Push buttons 2.5-V CMOS 4 One

DEV_CLRn

DIP switches 2.5-V CMOS 4 —

Character LCD 2.5-V CMOS 11 —

LEDs 2.5-V CMOS 7 —

Clock or Oscillators 2.5-V CMOS + LVDS + PCML 18 Nine reference clock

Total I/O Used: 423

1 2 ... 8 9 10 11 12 13 14 15 16 17 18 ... 59 60

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