Altera Stratix V Avalon-ST Manuale Utente Scaricare il pdf (Pagina 141)

Figure 11-3: Specifying the Number of Transceiver Interfaces for Arria V GZ and Stratix V Devices

The Transceiver Reconfiguration Controller includes an Optional interface grouping parameter.

Transceiver banks include six channels. For a ×4 variant, no special interface grouping is required because

all 4 lanes and the TX PLL fit in one bank.

Note:

Although you must initially create a separate logical reconfiguration interface for each lane and TX

PLL in your design, when the Quartus II software compiles your design, it reduces the original

number of logical interfaces by merging them. Allowing the Quartus II software to merge reconfi‐

guration interfaces gives the Fitter more flexibility in placing transceiver channels.

Note: You cannot use SignalTap to observe the reconfiguration interfaces.

UG-01097_sriov

2014.12.15

Connecting the Transceiver Reconfiguration Controller IP Core

11-3

Transceiver PHY IP Reconfiguration

Altera Corporation

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Altera Stratix V Avalon-ST Manuale Utente Pagina 141