Altera Stratix IV GX FPGA Manuale Utente Pagina 50

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A–2 Chapter :
Preparing Design Files for Flash Programming
Stratix IV GX FPGA Development Kit User Guide March 2014 Altera Corporation
c Altera recommends that you do not overwrite the factory hardware and factory
software images unless you are an expert with the Altera tools. If you unintentionally
overwrite the factory hardware or factory software image, refer to “Restoring the
Flash Device to the Factory Settings” on page A–4.
Preparing Design Files for Flash Programming
You can obtain designs containing prepared .flash files from the Stratix IV GX FPGA
Development Kit page of the Altera website or create .flash files from your own
custom design.
The Nios II EDS sof2flash command line utility converts your Quartus II-compiled
.sof into the .flash format necessary for the flash device. Similarly, the Nios II EDS
elf2flash command line utility converts your compiled and linked Executable and
Linking Format File (.elf) software design to .flash. After your design files are in the
.flash format, use the Board Update Portal or the Nios II EDS nios2-flash-
programmer utility to write the .flash files to the user hardware and user software
locations of the flash memory.
f For more information about Nios II EDS software tools and practices, refer to the
Embedded Software Development page of the Altera website.
Creating Flash Files Using the Nios II EDS
If you have an FPGA design developed using the Quartus II software, and software
developed using the Nios II EDS, follow these instructions:
1. On the Windows Start menu, click All Programs > Altera > Nios II EDS > Nios II
Command Shell.
2. In the Nios II command shell, navigate to the directory where your design files
reside and type the following Nios II EDS commands:
For Quartus II .sof files:
sof2flash --input=<yourfile>_hw.sof --output=<yourfile>_hw.flash --offset=0x00C20000
--pfl --optionbit=0x00018000 --programmingmode=PSr
For Nios II .elf files:
elf2flash --base=0x08000000 --end=0x0BFFFFFF --reset=0x08820000
--input=<yourfile>_sw.elf --output=<yourfile>_sw.flash
--boot=$SOPC_KIT_NIOS2/components/altera_nios2/
boot_loader_sources/boot_loader_cfi.srecr
1 For boards with dual-die CFI flash devices, use
--base=0x0A000000
only
when programming sw.flash. Continue to use
--base=0x08000000
for
hw.flash. For more information, refer to the Board Revision History appendix
of the Stratix IV GX FPGA Development Board Reference Manual.
The resulting .flash files are ready for flash device programming. If your design uses
additional files such as image data or files used by the runtime program, you must
first convert the files to .flash format and concatenate them into one .flash file before
using the Board Update Portal to upload them.
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