Altera ASI MegaCore Function Manuale Utente Scaricare il pdf (Pagina 4)

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Asynchronous Serial Interface (ASI) MegaCore Function User Guide January 2014 Altera Corporation

Additional Information

Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1

How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1

Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–2

1 2 3 4 5 6 7 8 9 ... 26 27

User Guide 1
Contents 3
Release Information 5
Device Family Support 5
Features 6
General Description 6
MegaCore Verification 6
Resource Utilization 7
Installation and Licensing 7
OpenCore Plus Evaluation 8
2. Getting Started 10
Design Flow 11
Simulate the Design 12
3. Parameter Settings 15
4. Functional Description 16
Receiver 17
8B10B Decoder 18
Oversampling Interface 18
Word Aligner 18
Synchronization State Machine 19
Packet Synchronization 19
Testbench 20
Notes for Table 4–1: 21
A. Constraints 22
Specify Clock Characteristics 23
337.5-MHz zero-degree Clocks 23
Minimize Timing Skew 24
Quartus II Assignment Editor: 25
Additional Information 26
Typographic Conventions 27

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