Altera PHY IP Core Guida Utente Pagina 89
- Pagina / 230
- Indice
- SEGNALIBRI
Valutato. / 5. Basato su recensioni clienti
Chapter 6: PHY IP Core for PCI Express (PIPE) 6–7
Parameter Settings
March 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
XCVR_TX_COMMON_MODE_
VOLTAGE
Transmitter Common
Mode Driver Voltage
Transmitter common-mode driver
voltage
VOLT_0P80V
VOLT_0P75V
VOLT_0P70V
VOLT_0P65V
VOLT_0P60V
VOLT_0P55V
VOLT_0P50V
VOLT_0P35V
PULL_UP
PULL_DOWN
TRISTATED1
GROUNDED
PULL_UP_TO
VCCELA
TRISTATED2
TRISTATED3
TRISTATED4
Pin
XCVR_TX_PRE_EMP_1ST_POST_
TAP
Transmitter Preemphasis
First Post-Tap
Specifies the first post-tap setting
value.
0 –31
Pin
XCVR_TX_PRE_EMP_2ND_
POST_TAP
Transmitter Preemphasis
Second Post-Tap
Specifies the second post-tap setting
value.
0–15
Pin
XCVR_TX_PRE_EMP_INV_
2ND_TAP
Transmitter Preemphasis
Second Tap Invert
Inverts the transmitter pre-emphasis
2nd post tap.
TRUE
FALSE
Pin
XCVR_TX_PRE_EMP_INV_
PRE_TAP
Transmitter Preemphasis
Pre Tap Invert
Inverts the transmitter pre-emphasis
pre-tap.
TRUE
FALSE
Pin
XCVR_TX_PRE_EMP_PRE_TAP
Transmitter Preemphasis
Pre-Tap
Specifies the pre-tap pre-emphasis
setting.
0 –15
Pin
XCVR_TX_RX_DET_ENABLE
Transmitter's Receiver
Detect Block Enable
Enables or disables the receiver
detector circuit at the transmitter.
TRUE
FALSE
Pin
XCVR_TX_RX_DET_MODE
Transmitter's Receiver
Detect Block Mode
Sets the mode for receiver detect block 0–15
Pin
XCVR_TX_RX_DET_OUTPUT_SEL
Transmitter's Receiver
Detect Block QPI/PCI
Express Control
Determines QPI or PCI Express mode
for the Receiver Detect block.
RX_DET_QPI_
OUT
RX_DET_PCIE_
OUT
Pin
XCVR_TX_VOD
Transmitter Differential
Output Voltage
Differential output voltage setting. The
values are monotonically increasing
with the driver main tap current
strength.
0–63
50
Pin
XCVR_TX_VOD_PRE_EMP_
CTRL_SRC
Transmitter V
OD
/
Preemphasis Control
Source
When set to
DYNAMIC_CTL
, the PCS
block controls the V
OD
and
preemphasis coefficients for PCI
Express. When this assignment is set
to
RAM_CTL
the V
OD
and preemphasis
are controlled by other assignments,
such as
XCVR_TX_PRE_EMP_1ST_POST_TAP
.
DYNAMIC_CTL
RAM_CTL
Pin
Table 6–5. Transceiver and PLL Assignments for Stratix V Devices (Sheet 1 of 3)
QSF Assignment Name
Pin Planner and
Assignment Editor
Name
Description Options Assign To
- User Guide 1
- Contents 3
- Chapter 7. Custom PHY IP Core 5
- Contents vi 6
- 1. Introduction 9
- Stratix V Device 10
- Reset Controller 11
- Avalon-MM PHY Management 11
- 1–4 Chapter 1: Introduction 12
- Unsupported Features 13
- 1–6 Chapter 1: Introduction 14
- 2. Getting Started 15
- Note to Figure2–2: 16
- Simulate the IP Core 18
- 3. 10GBASE-R PHY IP Core 19
- Release Information 20
- Note to Table 3–1: 21
- Stratix IV Devices 23
- Stratix V Devices 24
- SDR XGMII TX Interface 30
- Note to Table 3–9: 30
- SDR XGMII RX Interface 31
- Note to Table 3–11: 31
- Status Interface 32
- Clocks, Reset, and Powerdown 32
- Serial Interface 35
- Note to Table 3–15: 35
- TimeQuest Timing Constraints 40
- Note to Figure4–1: 43
- Note to Table 4–1: 44
- Advanced Options 51
- Configurations 52
- PMA Channel Controller 58
- Stratix IV GX Devices 65
- 5. Interlaken PHY IP Core 67
- Analog Settings 70
- Note to Figure5–2: 74
- Avalon-ST TX Interface 75
- Avalon-ST RX Interface 76
- PLL Interface 78
- TX and RX Serial Interface 78
- Optional Clocks for Deskew 78
- Transceiver Reconfiguration 81
- General Options 84
- Note to Figure6–2: 90
- PIPE Interface 92
- Note to Table 6–8: 93
- Transceiver Serial Interface 94
- Registers 95
- 7. Custom PHY IP Core 101
- Device Family Support 102
- Parameter Settings 103
- Word Alignment 106
- Rate Match FIFO 107
- 8B/10B Encoder and Decoder 108
- Byte Ordering 108
- PLL Reconfiguration 109
- Analog Options 110
- Presets for Ethernet 114
- Interfaces 115
- Note to Figure7–2: 116
- Clock Interface 118
- Status Signals (Optional) 118
- Note to Table 7–17: 119
- Register Interface 120
- Register Descriptions 121
- Dynamic Reconfiguration 124
- 8. Low Latency PHY IP Core 125
- Note to Table 8–4: 129
- Note to Table 8–5: 130
- Serial Data Interface 137
- Optional Status Interface 138
- PMA and Light-Weight PCS 139
- Arria V or Stratix V FPGA 143
- Auto-Negotiation 144
- Delay Estimation Logic 145
- Note to Figure9–2: 145
- Delay Numbers 146
- Note to Table 9–4: 147
- Additional Options 150
- TX and RX Status Signals 159
- Deterministic PHY IP Core 161
- Controller 167
- Note to Figure10–1: 169
- Note to Table 10–6: 174
- Embedded 175
- Offset Cancellation 176
- Duty Cycle Calibration 176
- PMA Analog Controls 177
- Pre-CDR Reverse Serial 178
- Loopback 178
- Post-CDR Reverse Serial 178
- ATX PLL Calibration 183
- Channel Reconfiguration 187
- Streamer Module 188
- Stratix V MIF 191
- Register-Based Write 193
- Register-Based Read 193
- Direct Write Reconfiguration 195
- Figure 10–6. Sample MIF 196
- Example 10–5. (continued) 197
- Notes to Figure 10–14: 205
- Transceiver 206
- XAUI PHY 209
- Port Differences 210
- Note to Table 11–3: 212
- Note to Table 11–5: 215
- Custom PHY 216
- Note to Table 11–6: 217
- Note to Table 11–7: 218
- Additional Information 219
- Revision History 220
- Note to Table: 228
- Typographic Conventions 229
Prodotti e manuali riguardandi Software Altera PHY IP Core
Software Altera UG-01080 Guida Utente
(120 pagine)
(120 pagine)
Software Altera DE2-115 Guida Utente
(107 pagine)
(107 pagine)
Software Altera UG-01080 Guida Utente
(484 pagine)
(484 pagine)
Aerocool EN57042 manuales
Manuales del propietario y guías del usuario para Cajas De Ordenadores Aerocool EN57042.
Ofrecemos 1 manuales en pdf Aerocool EN57042 para descargar gratis por tipos de documentos: Ficha de datos
Aerocool EN57042 Ficha de datos (11 paginas)
Marca: Aerocool | Categoria: Computer cases | Tamaño: 1.17 MB |
Tabla de contenidos
Más productos y manuales para Cajas De Ordenadores Aerocool
| Modelos | Tipo de documento |
|---|---|
| VS4 |
Ficha de datos
Aerocool VS4 computer case,
1 paginas
|
| ELEMENTWHITE |
Ficha de datos
Aerocool Sixth Element,
1 paginas
|
| EN58124 |
Ficha de datos
Aerocool XPredator Evil Green Edition,
10 paginas
|
| AE-VS9-550AP |
Ficha de datos
Aerocool Vs-9,
2 paginas
|
| EN56816 |
Ficha de datos
Aerocool Strike X GT Devil Red,
11 paginas
|
| QS-200 |
Ficha de datos
Aerocool QS-200 computer case,
10 paginas
|
| ELEMENTRED |
Ficha de datos
Aerocool Sixth Element,
1 paginas
|
| EN58032 |
Ficha de datos
Aerocool Strike X Advance Black,
11 paginas
|
| RS4 |
Ficha de datos
Aerocool RS4 computer case,
1 paginas
|
| AE-STRIKEX-ST-1100 |
Ficha de datos
Aerocool Strike X ST Black,
11 paginas
|
© 2020, manymanuals.it. Tutti i diritti riservati | 0.195 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Commenti su questo manuale