Altera Stratix II EP2S180 DSP Development Board Manuale Utente Pagina 43
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Altera Corporation Core Version a.b.c variable 2–35
Stratix II EP2S180 DSP Development Board Reference Manual
Board Components & Interfaces
27 D11 AA2
28 D12 AA4
29 D13 Y5
30 D14 AB2
31 D15 AB4
32 CS1# AC9
33 VS1# AB10
34 IORD# AC2
35 IOWR# AC1
36 WE# AC6
37 INTRQ AC4
38 VCC V
CC
(2)
39 CSEL# AC8
40 VS2# AB9
41 RESET (4) AE12
42 WAIT# AC3
43 INPACK# AC7
44 REG# AB7
45 DASP# AE4
46 PDIAG# AF2
47 DO8 V3
48 DO9 W2
49 D10 Y3
50 VSS
GND
(3)
Notes to Ta b le 2 – 28 :
(1) All pin numbers represent I/O pins on the FPGA, unless
otherwise noted.
(2) This FPGA I/O pin controls a power MOSFET that supplies
5V V
CC
to CON1.
(3) This pin does not connect to the FPGA directly.
(4) RESET is driven by the EPM7256AE configuration
controller device.
Table 2–28. CompactFlash (CON1) Pin Table (Part 2
of 2)
Pin on
CompactFlash
(CON1)
CompactFlash
Function (U60)
Connects to (1)
- Stratix II EP2S180 1
- DSP Development Board 1
- Reference Manual 1
- Part Number MNL-S20705-1.0 2
- Contents 3
- About This Manual 5
- Visual Cue Meaning 6
- 1. Introduction 7
- Handling the 8
- 2. Board Components & 9
- Environmental Requirements 11
- Using the Board 12
- Nonvolatile 13
- Configuration 13
- Nonvolatile Configuration 14
- Factory Open Open Open Open 14
- The Factory Design 15
- Functional 16
- Description 16
- Stratix II 19
- EP2S180F1020C3 19
- Components 20
- Switch Inputs 21
- Configuration Status LEDs 22
- A/D Converters 24
- D/A Converters 27
- Signal Name Stratix II Pin 29
- SRAM Memory (U43 & U44) 30
- Pin Name Pin Number 31
- Flash Memory (U17) 33
- SDRAM Memory (U39 and U40) 35
- Item Description 38
- Ethernet MAC/PHY (U16) 39
- CompactFlash Connector (CON1) 41
- Mictor Connector (J20) 44
- Stratix II Device 45
- Mictor Connector 45
- VGA Interface (J35) 46
- Expansion 48
- Interfaces 48
- RS-232C Serial I/O Interface 51
- Expansion Interfaces 56
- Notes to Figure 2–11: 56
- Notes to Figure 2–13: 58
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