
2–2 Core Version a.b.c variable Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual
Components & Interfaces
Table 2–1 describes the components on the board and the interfaces it
supports.
Table 2–1. Stratix II EP2S180 DSP Development Board Components & Interfaces (Part 1 of 2)
Component/
Interface
Type
Board
Designation
Description
Components
Stratix II device FPGA U18 EP2S180 Stratix II device
MAX Device PLD U10
EPM7256ETC144 device
A/D converters I/O U1, U2 Two 12-bit 125-MHz A/D converters
D/A converters I/O U14, U15 Two 14-bit 165-MHz D/A converters
1 MByte SRAM Memory U43, U44 1 MByte of 10-ns asynchronous SRAM configured as a
32-bit bus.
16 MBytes of flash
memory
Memory U17 16 Mbytes of flash memory configured as an 8-bit bus.
32 MBytes of
SDRAM
Memory U39, U40 32 MBytes of SDRAM memory configured as a 64-bit
bus
SMA external clock
input connectors
Input J10, J11, J12 SMA connectors for inputs of external clock signals,
terminated in 50 Ω.
Dual 7-segment
display
Display U12, U13 Dual 7-segment display.
Push-button
switches
I/O SW4, SW5,
SW6, SW7
Four push-button switches, which are user-defined as
logic inputs.
User-defined LEDs Display D1 - D8 Eight user-defined LEDs.
Power-on LED Display LED7 LED that illuminates when power is supplied to the
board.
CONF_DONE LED Display LED5 LED that illuminates upon successful configuration of
the Stratix II device.
RS-232 connector I/O J29 DB9 connector, configured as a DTE serial port. The
interface voltages are converted to 3.3-V signals and
brought to the Stratix II device, which must be
configured to generate and accept transmissions.
100-MHz oscillator Clock Y1 Socketed on-board 100-MHz oscillator.
Single 16-V DC
power supply
Input J22 (adapter) Board adapter for included 16-V DC power supply
Stratix II device Joint
Test Action Group
(JTAG) Connector
I/O J21 JTAG Connector used to configure the Stratix II device
directly
Configuration
controller JTAG
Connector
I/O J13 JTAG connector used to configure the configuration
controller
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