Altera RapidIO II MegaCore Function manuali

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Altera RapidIO II MegaCore Function Manuale Utente (218 pagine)

Marchio: Altera | Categoria: Strumenti di misura | Dimensione: 3.02 MB |

Indice

User Guide

RapidIO II MegaCore Function

Contents

Contents v

Chapter 5. Signals

Chapter 6. Software Interface

Chapter 7. Testbench

1. About The RapidIO II

MegaCore Function

Releases

RapidIO II IP Core Features

Features

Device Family Support

IP Core Verification

Hardware Testing

Interoperability Testing

Note to Table 1–3:

Notes to Table 1–4:

Installation and Licensing

2. Getting Started

Simulating IP Cores

Transceiver Settings

External Transceiver PLL

3. Parameter Settings

Note to Table 3–1:

Enable 16-Bit Device ID Width

Logical Layer Settings

Capability Registers Settings

Device ID

Vendor ID

Revision ID

Assembly ID

Assembly Information CAR

Enable Flow Control Support

Enable Switch Support

Number of Ports

Port Number

Maximum PDU

Destination Operations CAR

Port General Control CSR

Port 0 Control CSR

Lane n Status 0 CSR

Extended Features Pointer CSR

4. Functional Description

Note to Table 4–2:

Clocking and Reset Structure

Notes to Table 4–3:

RapidIO II

Transactions

Notes to Table 4–6:

Notes to Table 4–7:

Note to Table 4–8:

Note to Figure 4–9:

Note to Table 4–10:

Notes to Table 4–11:

Table 6–60 on page 6–40

Note to Table 4–12:

Maintenance Module

Maintenance Interface Signals

Doorbell Module Block Diagram

Preserving Transaction Order

Doorbell Module Signals

Generating a Doorbell Message

Receiving a Doorbell Message

Transaction ID Ranges

Notes to Table 4–24:

Note to Table 4–26:

Note to Table 4–27:

field

User Receiving Write Request

100

Logical Layer Interfaces

101

Transport Layer

112

Receiver

113

Transmitter

114

Physical Layer

115

Physical Layer Interfaces

116

Low-level Interface Receiver

116

CRC Checking and Removal

117

Protocol Violations

119

Fatal Errors

119

Maintenance Avalon-MM Slave

120

Maintenance Avalon-MM Master

121

Port-Write Reception Module

122

Input/Output Avalon-MM Slave

122

Input/Output Avalon-MM Master

123

5. Signals

125

Physical Layer Signals

126

Low Latency Signals

127

Multicast Event Signals

128

Chapter 5: Signals 5–5

129

Note to Table 5–7:

130

Chapter 5: Signals 5–7

131

5–8 Chapter 5: Signals

132

133

Avalon-MM Interface Signals

133

Note to Table 5–12:

134

Chapter 5: Signals 5–11

135

Note to Table 5–15:

136

Error Reporting Signals

137

5–14 Chapter 5: Signals

138

6. Software Interface

139

Memory Map

140

Physical Layer Registers

144

Note to Table 6–9:

147

Note to Table 6–14:

154

Note to Table 6–15:

158

Note to Table 6–17:

160

Note to Table 6–22:

164

Note to Table 6–23:

164

Note to Table 6–24:

165

Note to Table 6–25:

165

Note to Table 6–26:

166

Note to Table 6–27:

167

Notes to Table 6–28:

168

Notes to Table 6–29:

169

Note to Table 6–30:

169

Note to Table 6–31:

169

Notes to Table 6–32:

170

Note to Table 6–34:

171

Note to Table 6–35:

171

Note to Table 6–36:

172

Note to Table 6–37:

172

Transmit Port-Write Registers

174

Receive Port-Write Registers

175

Note to Table 6–59:

178

Error Management Registers

180

Note to Table 6–66:

181

Notes to Table 6–67:

183

Notes to Table 6–70:

185

Notes to Table 6–71:

185

Doorbell Message Registers

191

Note to Table 6–89:

193

7. Testbench

195

7–2 Chapter 7: Testbench

196

Testbench Overview

196

Testbench Sequence

197

7–4 Chapter 7: Testbench

198

Chapter 7: Testbench 7–5

199

SWRITE Transactions

200

NREAD Transactions

200

NWRITE_R Transactions

201

NWRITE Transactions

202

Doorbell Transactions

202

Port-Write Transactions

203

Testbench Completion

204

Chapter 7: Testbench 7–11

205

7–12 Chapter 7: Testbench

206

A. Initialization Sequence

207

MegaCore Function v12.1

209

Additional Information

213

Info–2 Additional Information

214

Document Revision History

214

Additional Information Info–3

215

Info–4 Additional Information

216

Note to Table:

217

Info–6 Additional Information

218

Typographic Conventions

218

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Altera RapidIO II MegaCore Function manuali

Altera RapidIO II MegaCore Function Manuale Utente (218 pagine)

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