Altera MAX 10 FPGA Manuale Utente Scaricare il pdf (Pagina 50)

Altera Dual Configuration IP Core References

2015.05.04

UG-M10CONFIG

Send Feedback

Altera Dual Configuration IP Core Avalon-MM Address Map

Table 5-1: Altera Dual Configuration IP Core Avalon-MM Address Map for MAX 10 Devices

• Altera recommends you to set the reserve bits to 0 for write operations. For read operations, the IP core will

always generate 0 as the output.

• Write 1 to trigger any operation stated in the description.

• You need to trigger the desired operation from offset 2 before any read operation of offset 4, 5, 6 and 7.

Offset R/W Width

(Bits)

Description

0 W 32

• Bit 0—trigger reconfiguration.

• Bit 1—reset the watchdog timer.

• Bit 31:2—reserved.

Signals are triggered at the same write cycle on Avalon.

1 W 32

• Bit 0—trigger config_sel_overwrite to the input register.

• Bit 1—writes config_sel to the input register. Set 0 or 1 to load

from configuration image 0 or 1 respectively.

• Bit 31:2—reserved.

The busy signal is generated right after the write cycle, while the

configuration image information is registered. Once busy signal is

high, writing to this address is ignored until the process is

completed and the busy signal is de-asserted.

trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as

trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance

of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any

products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,

product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device

specifications before relying on any published information and before placing orders for products or services.

ISO

9001:2008

Registered

www.altera.com

101 Innovation Drive, San Jose, CA 95134

1 2 ... 45 46 47 48 49 50 51 52 53 54 55 56

Commenti su questo manuale

Nessun commento

Altera MAX 10 FPGA Manuale Utente Pagina 50

Commenti su questo manuale

Prodotti e manuali riguardandi Strumenti di misura Altera MAX 10 FPGA