Altera Internal Memory (RAM and ROM) IP Core Manuale Utente Scaricare il pdf (Pagina 26)

Embedded Memory Signals and Parameters

2014.12.17

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Describes the signals and parameters of the RAM: 1-PORT, RAM: 2-PORT, ROM: 1-PORT, and ROM: 2-

PORT IP cores.

Signals

This table lists the signals for RAM:1-PORT, RAM: 2-PORT, ROM:1-PORT, and ROM:2-PORT IP cores.

Table 4-1: RAM:1-PORT, RAM: 2-PORT, ROM:1-PORT, and ROM:2-PORT IP Cores

Signal Type Required Description

data_a Input Optional Data input to port A of the memory.

The data_a port is required if you set the operation_

mode parameter to any of the following values:

• SINGLE_PORT

• DUAL_PORT

• BIDIR_DUAL_PORT

address_a Input Yes Address input to port A of the memory.

The address_a signal is required for all operation modes.

wren_a Input Optional Write enable input for address_a port.

The wren_a signal is required if you set the operation_

mode to any of the following values:

• SINGLE_PORT

• DUAL_PORT

• BIDIR_DUAL_PORT

rden_a Input Optional Read enable input for address_a port. The rden_a signal

is supported depending on your selected memory mode

and memory block.

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