Altera Hybrid Memory Cube Controller Manuale Utente Scaricare il pdf (Pagina 38)

HMC Controller IP Core Signals

2015.05.04

UG-01152

Send Feedback

The HMC Controller IP core communicates with other design components through multiple interfaces.

The IP core has the following top-level signals:

Application Interface Signals on page 4-1

HMC Interface Signals on page 4-8

The HMC Controller IP core's HMC interface connects to the external HMC device's link interface and

main reset signal.

Signals on the Interface to the I2C Master on page 4-9

Your design must include an I

C master module that drives the HMC device I

C interface for link

initialization. This interface connects to the I

C module.

Control and Status Interface Signals on page 4-10

Status and Debug Signals on page 4-11

Clock and Reset Signals on page 4-12

Transceiver Reconfiguration Signals on page 4-13

Signals on the Interface to the External PLLs on page 4-15

Application Interface Signals

The application interface supports easy access to the external HMC device by providing a simple data path

interface to specify memory read and write requests and to receive memory read and write responses. This

interface is also called the data path interface.

Related Information

Application Interfaces on page 3-2

Application Request Interface

The data path request interface, or application request interface, provides a 512-bit or 256-bit data bus

and dedicated signals for the application to provide HMC request packet field values to the HMC

Controller IP core. Full-width variations have a 512-bit data bus, and half-width variations have a 256-bit

data bus. The interface supports Write requests with payload sizes up to 128 bytes. In full-width

variations, the maximum payload size limits the interface to data bursts of 2 or fewer core_clk clock

trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as

trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance

of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any

products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,

product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device

specifications before relying on any published information and before placing orders for products or services.

ISO

9001:2008

Registered

www.altera.com

101 Innovation Drive, San Jose, CA 95134

1 2 ... 33 34 35 36 37 38 39 40 41 42 43 ... 68 69

Commenti su questo manuale

Nessun commento

Altera Hybrid Memory Cube Controller Manuale Utente Pagina 38

Commenti su questo manuale

Prodotti e manuali riguardandi Strumenti di misura Altera Hybrid Memory Cube Controller