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November 2011 Altera Corporation Transceiver Signal Integrity Development Kit,
Stratix IV GT Edition Reference Manual
1. Overview
Introduction
The Transceiver Signal Integrity Development Kit, Stratix
®
IV GT Edition allows you
to evaluate the performance the Stratix IV GT transceivers and the low power benefits
of the device itself. This document provides the detailed pin-out and component
reference information required to create FPGA designs for implementation on the
development board.
f For information about setting up the Stratix IV GT transceiver signal integrity
development board, and using the included software, refer to the Transceiver Signal
Integrity Development Kit, Stratix IV GT Edition User Guide.
General Description
The Stratix IV GT transceiver signal integrity development board provides a
hardware platform for evaluating the performance and signal integrity features of the
Altera
®
Stratix IV GT devices. The board features the following major component
blocks:
EP4S100G2F40I1N FPGA
0.95-V core
1517-pin Fineline BGA (FBGA)
FPGA Configuration
MAX
®
II+Flash Fast Passive Parallel (FPP) configuration
Flash storage for two configuration images (factory and user)
On-Board USB-Blaster
TM
using the Quartus
®
II Programmer
JTAG header for external USB-Blaster with the Quartus II Programmer
On-Board Memory
64-MB synchronous flash
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