Altera Shift Register IP Core Manuale Utente Scaricare il pdf (Pagina 13)

CommentsDescriptionRequiredPort Name

Sets q[] outputs to value specified by LPM_

SVALUE, if that value is present, or sets the q

outputs to all 1s. If both sset and sclr are

used and asserted, sclr is dominant. sset

signal affects q[] outputs before polarity is

applied to ports.

Synchronous set input.Nosset

If both aset and aclr are used and both are

asserted, aclr is dominant. aclr signal affects

the q[] outputs before polarity is applied to the

ports.

Asynchronous clear input.Noaclr

Sets q[] outputs to the value specified by LPM_

AVALUE, if that value is present, or sets the q[]

outputs to all 1s. If both aset and aclr are

used and both are asserted, aclr is dominant.

aset signal affects q[] outputs before polarity

is applied to ports.

Asynchronous set input.Noaset

LPM_SHIFTREG Megafunction Output Ports

Table 4: Output Ports for the LPM_SHIFTREG Megafunction

CommentsDescriptionRequiredPort Name

Output port LPM_WIDTH wide. Either q[] or

shiftout or both must be used.

Data output from the shift register.Noq[]

Either q[] or shiftout or both must be used.

shiftout port value is equal to q[LPM_

WIDTH-1] when LPM_DIRECTION=”LEFT”.

When LPM_DIRECTION=”RIGHT”,

shiftout equals q[0].

Serial shift data output.Noshiftout

LPM_SHIFTREG Megafunction Parameters

Table 5: Parameters for the LPM_SHIFTREG Megafunction

CommentsRequiredTypeParameter

Width of the data[] and q ports.YesIntegerLPM_WIDTH

Values are “LEFT”, “RIGHT”, and “UNUSED”. If

omitted, default is “LEFT”. MSB is the leftmost bit,

LSB is rightmost bit. The MSB is q[LPM_WIDTH-1].

NoStringLPM_DIRECTION

Altera Corporation

LPM_SHIFTREG Megafunction

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LPM_SHIFTREG Megafunction Output Ports

UG-033105

2013.03.05

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Altera Shift Register IP Core Manuale Utente Pagina 13

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