Altera HardCopy II Clock Uncertainty Calculator Manuale Utente Scaricare il pdf (Pagina 10)

1–4 Altera Corporation

HardCopy II Clock Uncertainty Calculator User Guide August 2007

General Description

used as the input file for clock uncertainty calculators. The other file,

PLL_Names.txt, contains the PLL indices and the associated PLL names.

Even if the design does not contain a PLL, you still must run the Tcl script.

Clock Transfer Report

Before continuing on to the clock uncertainty calculator spreadsheet, you

must generate the clock transfer report using TimeQuest Timing

Analyzer. The clock transfer report covers the clock-to-clock transfer in

the design if a path exists between two registers that are clocked by two

clocks. The two clocks are source and destination clocks, and they may be

the same or different clocks. This report of clock transfer from the

TimeQuest Timing Analyzer is not an input file for the clock uncertainty

calculator, but rather provides useful information you may need when

setting the clock uncertainty timing constraints (SDC) for the design. For

example:

set_clock_uncertainty –setup –from clk_source –to

clk_destination 0.150

where clk_source is source clock name, and clk_destination is the

destination clock name.

Clock uncertainty is based on I/O buffer noise, clock network noise, core

noise, PLL jitter, or static phase error. Thus, the clock transfer information

plays an important role in the clock uncertainty calculator flow. There are

three types of clock transfers that clock uncertainty calculator flow

covers:

■ Intra-clock transfer

■ Inter-clock transfer

■ I/O transfer

f Refer to the TimeQuest Timing Analyzer chapter in volume 3 of the

Quartus II Handbook for more information about report clock transfer.

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Altera HardCopy II Clock Uncertainty Calculator Manuale Utente Pagina 10