Altera Cyclone IV GX FPGA Development Board Manuale Utente Pagina 6

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1–2 Chapter 1: Overview
Board Component Blocks
Cyclone IV GX FPGA Development Board May 2013 Altera Corporation
Reference Manual
On-Board memory
4-MB (x16) Synchronous Static Random Access Memory (SSRAM)
Two 32-MB (x32) DDR2 SDRAM
64-MB flash
On-Board clocking circuitry
50.000-MHz oscillator
125.000-MHz oscillator
SMA clock input
SMA clock output
Programmable oscillator (default: 100.000-MHz)
General user I/O
LEDs and display
Eight FPGA user LEDs
One configuration done LED
One error LED
Five Ethernet status LEDs
One USB status LED
One power status LED
Five configuration LEDs
A two-line 16-character LCD display
Push buttons
One CPU reset push button
One MAX II configuration reset push button
One program-load push button—configure the FPGA from flash memory
One program-select push button—select image to load from flash memory
or serial configuration (EPCS) device
Four general user push buttons
DIP switches
Board settings DIP switch
JTAG chain select DIP switch
PCIe control DIP switch
Configuration settings DIP switch
User DIP switch
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