Altera Cyclone II DSP Development Board manuali

Manuali dei proprietari e guide per l'utente per Strumenti di misura Altera Cyclone II DSP Development Board.
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Indice

Reference Manual

1

MNL-CII012805-1.1

2

Contents

3

About This Manual

5

Typographic

6

Conventions

6

Chapter 1. Introduction

7

Features Overview

8

Chapter 2. Cyclone II DSP

9

Development

9

Board Components

9

Components & Interfaces

10

USER EPCS (U36)

11

(Flash Memory)

11

Expansion Connectors

13

General Connectors

13

DIMM_SYNC_CLK) is a

14

CONFIG_DONEn is asserted)

15

Featured Device

17

User Interfaces

17

Closed Position

19

Open Position

19

USER_PB3 AE14

20

USER_PB2 AE22

20

USER_PB1 AE16

20

USER_PB0 AC18

20

Audio CODEC Converter (U11)

22

Audio Jacks (J10, J14, J16)

22

VGA Output Connector (J21)

23

D/A Converter (U25 & U30)

25

D/A Converter Clocks

26

CLK_OSC_DACA (Channel A)

27

CLK_OSC_DACB (Channel B)

27

FPGA_TO_DAC_CLK

27

SMA_TO_DAC_CLK

27

Note to Table 2–13:

28

A/D Converter (U26 & U31)

30

A/D Converter Clocks

31

CLK_OSC_ADCA (Channel A)

32

CLK_OSC_ADCB (Channel B)

32

FPGA_TO_ADC_CLK

32

SMA_TO_ADC_CLK

32

Note to Table 2–18:

33

Components

34

DDR2 SDRAM DIMM Clocks

35

Memory Components

36

Note to Figure 2–12:

36

EPCS Select (J29)

45

Synchronous SRAM Device (U22)

47

Note to Table 2–23:

49

■ EVM_CEn2 selects the SSRAM

50

J15Pin 1

51

Pin 1 Pin 1

51

Notes to Figure 2–16:

52

Note to Table 2–24:

55

General

58

Connectors

58

Mictor Connector (J12)

61

Notes to Figure 2–19:

62

Note to Table 2–28:

64

Status LEDs &

65

Reset/Power

65

Switches

65

USER RESET

66

SYS RESET

66

Clock Circuitry

67

Setting the Clocks

68

CLK SMA Connector (J17)

69

Clock Buffer (U16)

71

Power Supply

72

Power Plane

78

Supplies

78

Settings

78

Appendix A. DDR2 SDRAM

79

DIMM Connector Pin Out Table

79

DIMM_DQS5 C12 C12

82

DIMM_DQS6 B14 B14

82

DIMM_DQS7 C17 C17

82

DIMM_DQS8 B6 B6

82

Appendix B. SSRAM

83

Pin-Out Table

83

Note to Ta ble B –1:

85

Appendix C. Cyclone II EP2C70

87

Device Pin-Out Table

87

Appendix D. Restoring the

109

Factory Design

109

SAFE/USER Mode

110

ASI Connector

111

JTAG Cable

111

Introduction

112





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