Altera Arria II GX FPGA Manuale Utente Scaricare il pdf (Pagina 26)

6–6 Chapter 6: Board Test System

Using the Board Test System

Arria II GX FPGA Development Kit User Guide February 2011 Altera Corporation

■ PSR—Sets the MAX II PSR register. The numerical values in the list corresponds to

the page of flash memory to load during FPGA reconfiguration. Refer to Table 6–1

for more information.

■ PSS—Displays the MAX II PSS register value. Refer to Table 6–1 for the list of

available options.

■ OCR1—Sets the MAX II OCR1 register. Refer to Table 6–1 for the list of available

options.

■ SRST—Resets the system and reloads the FPGA with a design from flash memory

based on the other MAX II register values. Refer to Table 6–1 for more information.

1 Because the Config tab requires that a specific design is running in the FPGA at a

specific clock speed, writing a 0 to SRST; writing a 1, 2, or 3 to OCR2; or changing the

PSO value can cause the Board Test System to stop running.

JTAG Chain

This control shows all the devices currently in the JTAG chain. The Arria II GX device

is always the first device in the chain.

1 Uninstalling the shunt jumper from jumper J9 pins 1-2 includes the MAX II device in

the JTAG chain.

Board Information

This control displays static information about your board.

■ MAX-II rev—Indicates the version of MAX II code currently running on the

board. The MAX II code resides in the <install

dir>\kits\arriaIIGX_2agx125_fpga\examples directory. Newer revisions of this

code might be available on the Arria II GX FPGA Development Kit page of the

Altera website.

■ MAC—Indicates the MAC address of the board.

Flash Memory Map

This control shows the memory map of the flash memory device on your board.

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Altera Arria II GX FPGA Manuale Utente Pagina 26