Altera Arria II GX FPGA Development Board Manuale Utente Scaricare il pdf (Pagina 53)

Chapter 2: Board Components 2–45

Memory

February 2011 Altera Corporation Arria II GX FPGA Development Board Reference Manual

Table 2–43 lists the DDR2 SODIMM component references and manufacturing

information.

SSRAM

The SSRAM device consists of a single standard synchronous SRAM, providing 2 MB

of memory with a 36-bit data bus. This device is part of the shared FSM bus which

connects to the flash memory, SRAM, and MAX

II CPLD EPM2210 System Controller.

The device speed is 200 MHz single-data-rate. There is no minimum speed for this

device. The theoretical bandwidth of this 32-bit memory interface is 6.4 Gbps for

continuous bursts. The read latency for any address is two clocks, in which at

200 MHz, the latency is 10 ns and at 50 MHz, the latency is 40 ns. The write latency is

one clock.

Table 2–44 lists the SSRAM pin assignments, signal names, and functions. The signal

names and types are relative to the Arria II GX device in terms of I/O setting and

direction.

J7.167 Data strobe N byte lane 6

DDR2_DQSN6

1.8-V SSTL Class I

AL12

J7.179 Data bus byte lane 7

DDR2_DQ56

AM10

J7.181 Data bus byte lane 7

DDR2_DQ57

AF15

J7.189 Data bus byte lane 7

DDR2_DQ58

AP2

J7.191 Data bus byte lane 7

DDR2_DQ59

AJ12

J7.180 Data bus byte lane 7

DDR2_DQ60

AJ16

J7.182 Data bus byte lane 7

DDR2_DQ61

AN9

J7.192 Data bus byte lane 7

DDR2_DQ62

AP3

J7.194 Data bus byte lane 7

DDR2_DQ63

AN4

J7.185 Write mask byte lane 7

DDR2_DM7

AE15

J7.188 Data strobe P byte lane 7

DDR2_DQS7

AM7

J7.186 Data strobe N byte lane 7

DDR2_DQSN7

AM8

Table 2–42. DDR2 SODIMM Pin Assignments, Signal Names and Functions (Part 4 of 4)

Board Reference Description Schematic Signal

Name

I/O Standard

Arria II GX

Device

Pin Number

Table 2–43. DDR2 SODIMM Component References and Manufacturing Information

Board

Reference

Description Manufacturer

Manufacturing

Part Number

Manufacturer

Website

J7 200-pin DDR2 SODIMM socket Tyco Electronics 1-1734075-1 www.tycoelectronics.com

Module 128 M × 8 banks, 400M, CL6 Micron MT8HTF12864HY-800G1 www.micron.com

Table 2–44. SSRAM Pin Assignments, Schematic Signal Names, and Functions (Part 1 of 3)

Board Reference Description

Schematic Signal Name

I/O Standard

Arria II GX Device

Pin Number

U22.R6 Address bus

FSM_A2

2.5-V

D29

U22.P6 Address bus

FSM_A3

J21

U22.A2 Address bus

FSM_A4

L13

1 2 ... 48 49 50 51 52 53 54 55 56 57 58 ... 63 64

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